• Pipeline arithmetic units are usually found in very high speed computers
• Floating–point operations, multiplication of fixed-point numbers, and similar computations in scientific problem
• Floating–point operations are easily decomposed into sub operations.
• An example of a pipeline unit for floating-point addition and subtraction is showed in the following:
• The inputs to the floating-point adder pipeline are two normalized floating-point binary number

X = A´ 2a

Y = B ´ 2b

• A and B are two fractions that represent the mantissas
• The floating-point addition and subtraction can be performed in four segments, as shown in Fig. 4-6.
• The suboperations that are performed in the four segments are:
• Compare the exponents
• The larger exponent is chosen as the exponent of the result.
• Align the mantissas
• The exponent difference determines how many times the mantissa associated with the smaller exponent must be shifted to the right.
• Add or subtract the mantissas and b are the exponents
• Normalize the result
• When an overflow occurs, the mantissa of the sum or difference is shifted right and the exponent incremented by one.
• If an underflow occurs, the number of leading zeros in the mantissa determines the number of left shifts in the mantissa and the number that must be subtracted from the exponent.
• The following numerical example may clarify the suboperations performed in each segment.
• The comparator, shift, adder, subtractor, incrementer, and decrementer in the floating-point pipeline are implemented with combinational circuits.
• Suppose that the time delays of the four segments are t1=60ns, t2=70ns, t3=100ns, t4=80ns, and the interface registers have a delay of tr=10ns
• Pipeline floating-point arithmetic delay: tp=t3+tr=110ns
• Nonpipeline floating-point arithmetic delay: tn=t1+t2+t3+t4+tr=320ns
• Speedup: 320/110=2.9 Fig 4-6: Pipeline for floating point addition and subtraction