• Data transfer operations: This group of instructions copies data from source to destination.  The content of the source is not altered.


  • Arithmetic operations: Instructions of this group perform operations like addition, subtraction, increment & decrement. One of the data used in arithmetic operation is stored in accumulator and the result is also stored in accumulator.


  • Logical operations: Logical operations include AND, OR, EXOR, The operations like AND, OR and EXOR uses two operands, one is stored in accumulator and other can be any register or memory location. The result is stored in accumulator. NOT operation requires single operand, which is stored in accumulator.


  • Branching operations: Instructions in this group can be used to transfer program sequence from one memory location to another either conditionally or unconditionally.


  • Stack, I/O and Machine control instructions: Instruction in this group control execution of other instructions and control operations like interrupt, halt etc.

Data transfer instructions:

 Instructions, which are used to transfer data from one register to another register, from memory to register or register to memory, come under this group.




  1. MOV r1, r2 (Move Data; Move the content of the one register to another). [r1] <-- [r2]


  1. MOV r, m (Move the content of memory register). r <-- [M]


  1. MOV M, r.(Move the content of register to memory). M <-- [r]


  1. MVI r, data. (Move immediate data to register). [r] <--


  1. MVI M, data. (Move immediate data to memory). M <--


  1. LXI rp, data 16. (Load register pair immediate). [rp] <-- data 16 bits, [rh] <-- 8 LSBs of data.


  1. LDA addr.(Load Accumulator direct). [A] <-- [addr].


  1. STA addr. (Store accumulator direct). [addr] <-- [A].


  1. LHLD addr.(Load H-L pair direct). [L] <-- [addr], [H] <-- [addr+1].


  1. SHLD addr. (Store H-L pair direct) [addr] <-- [L], [addr+1] <-- [H]. LDAX rp. (LOAD accumulator indirect) [A] <-- [[rp]]
  2. STAX rp. (Store accumulator indirect) [[rp]] <-- [A].
  1. STAX rp.(Store accumulator indirect) [[rp]] <-- [A].
  1. XCHG.(Exchange the contents of H-L with D-E pair) [H-L] <--> [D-E].

2)   Arithmetic instructions:


The instructions of this group perform arithmetic operations such as addition, subtraction; increment or decrement of the content of a register or memory.




  1. ADD r. (Add register to accumulator) [A] <-- [A] + [r].
  2. .ADD M. (Add memory to accumulator) [A] <-- [A] + [[H-L]].
  3. ADC r. (Add register with carry to accumulator). [A] <-- [A] + [r] + [CS].
  4. ADC M. (Add memory with carry to accumulator) [A] <-- [A] + [[H-L]] [CS].
  5. ADI data (Add immediate data to accumulator) [A] <-- [A] + data.
  6. ACI data (Add with carry immediate data to accumulator). [A] <-- [A] + data + [CS].
  7. DAD rp. (Add register pair to H-L pair). [H-L] <-- [H-L] + [rp].
  8. SUB r. (Subtract register from accumulator). [A] <-- [A] – [r].
  9. SUB M. (Subtract memory from accumulator). [A] <-- [A] – [[H-L]].
  10. SBB r. (Subtract register from accumulator with borrow). [A] <-- [A] – [r] – [CS].
  11. SBB M. (Subtract memory from accumulator with borrow). [A] <-- [A] – [[H-L]] – [CS].
  12. SUI data. (Subtract immediate data from accumulator) [A] <-- [A] – data.
  13. SBI data. (Subtract immediate data from accumulator with borrow). [A] <-- [A] – data – [CS].
  14. INR r (Increment register content) [r] <-- [r] +1.
  15. INR M. (Increment memory content) [[H-L]] <-- [[H-L]] + 1.
  16. DCR r. (Decrement register content). [r] <-- [r] – 1.
  17. DCR M. (Decrement memory content) [[H-L]] <-- [[H-L]] – 1.
  18. INX rp. (Increment register pair) [rp] <-- [rp] – 1.
  19. DCX rp (Decrement register pair) [rp] <-- [rp] -1.
  20. DAA (Decimal adjust accumulator).

3)   Logical instructions:

 The Instructions under this group perform logical operation such as AND, OR, compare, rotate etc.



  1. ANA r. (AND register with accumulator) [A] <-- [A] ^ [r].
  2. ANA M. (AND memory with accumulator). [A] <-- [A] ^ [[H-L]].
  3. ANI data. (AND immediate data with accumulator) [A] <-- [A] ^ data.
  4. ORA r. (OR register with accumulator) [A] <-- [A] ˅[r].
  5. ORA M. (OR memory with accumulator) [A] <-- [A] ˅ [[H-L]]
  6. ORI data. (OR immediate data with accumulator) [A] <-- [A] ˅ data.
  7. XRA r. (EXCLUSIVE – OR register with accumulator) [A] <-- [A] xor [r]
  8. XRA M. (EXCLUSIVE-OR memory with accumulator) [A] <-- [A] xor [[H-L]]
  9. XRI data. (EXCLUSIVE-OR immediate data with accumulator) [A] <-- [A] xor data.
  10. CMA. (Complement the accumulator) [A] <-- [A]ˈ
  11. CMC. (Complement the carry status) [CS] <-- [CS]ˈ
  12. STC. (Set carry status) [CS] <-- 1.
  13. CMP r. (Compare register with accumulator) [A] – [r]
  14. CMP M. (Compare memory with accumulator) [A] – [[H-L]]
  15. CPI data. (Compare immediate data with accumulator) [A] – data.
  16. RAL (Rotate accumulator left) [An+1] <-- [An], [A0] <-- [A7],[CS] <-- [A7].

The content of the accumulator is rotated left by one bit. The seventh bit of the accumulator is moved to carry bit as well as to the zero bit of the accumulator. Only CS flag is affected.

17. RAR. (Rotate accumulator right) [A7] <-- [A0], [CS] <-- [A0], [An] <-- [An+1].

The content of the accumulator is rotated right by one bit. The zero bit of the accumulator is moved to the seventh bit as well as to carry bit. Only CS flag is affected.


  1. RLC. (Rotate accumulator left through carry) [An+1] <-- [An], [CS] <-- [A7], [A0] <-- [CS].
  2. RCC. (Rotate accumulator right through carry) [An] <-- [An+1], [CS] <-- [A0], [A7] <-- [CS].


4)   Branching Instructions:

 This group includes the instructions for conditional and unconditional jump, subroutine call and return, and restart.


Unconditional jump:

MP addr (label). (Unconditional jump: jump to the instruction specified by the address). [PC] <-- Label.

Conditional Jump:

Conditional Jump addr (label): After the execution of the conditional jump instruction the program jumps to the instruction specified by the address (label) if the specified condition is true. The program proceeds further in the normal sequence if the specified condition is not true.

  1. JZ addr (label). (Jump if ZF=1)
  2. JNZ addr (label) (Jump if ZF=0)
  3. JC addr (label). (Jump if CF=1)
  4. JNC addr (label). (Jump if CF=0)
  5. JP addr (label). (Jump if the result is plus)
  6. JM addr (label). (Jump if the result is minus)
  7. JPE addr (label) (Jump if even parity)
  8. JPO addr (label) (Jump if odd parity)
  9. CALL addr (label) (Unconditional CALL: call the subroutine identified by the operand)
  10. CALL instruction is used to call a subroutine.
  11. RET (Return from subroutine).
  12. RST n (Restart) Restart is a one-word CALL instruction. The content of the program counter is saved in the stack. The program jumps to the instruction starting at restart location.

5) Stack, I/O and Machine control instructions:


  1. IN port-address. (Input to accumulator from I/O port) [A] <-- [Port]
  2. OUT port-address (Output from accumulator to I/O port) [Port] <-- [A]
  3. PUSH rp (Push the content of register pair to stack)
  4. PUSH PSW (PUSH Processor Status Word)
  5. POP rp (Pop the content of register pair, which was saved, from the stack)
  6. POP PSW (Pop Processor Status Word)
  7. HLT (Halt)
  8. XTHL (Exchange stack-top with H-L)
  9. SPHL (Move the contents of H-L pair to stack pointer)
  10. EI (Enable Interrupts)
  11. DI (Disable Interrupts)
  12. SIM (Set Interrupt Masks)
  13. RIM (Read Interrupt Masks)
  14. NOP (No Operation).