Digital Systems Syllabus - BCIS (PU)

Course Objectives

The aim of the module is to introduce to the students the topics that include combinational and sequential circuit analysis and design, digital circuit design optimization methods using random logic gates, multiplexers, decoders, registers, counters and programmable logic arrays.

Course Description

This module introduces the concepts of the design and implementation of digital circuits. Laboratory experiments will be used to reinforce the theoretical concepts discussed in lectures. The lab experiments will involve the design and implementation of digital circuits. Emphasis is on the use computer aided tools in the design, simulation, and testing of digital circuits.

Course Outcomes

By the end of this course, students should be able to:

• use Boolean algebra and resulting logic for control and data paths;
• do simple design with basic digital building blocks such as multiplexors, selectors, and shift registers and flip flops;
• define the problem (Inputs and Outputs), write its functions;
• Implement functions using digital circuit (Combinational or Sequential);
• use simulation software for testing the designed circuit.

Course Contents

Unit I: Number System                                                                                                  4 hours

Decimal, Binary, Octal and Hexadecimal Number System; Basic arithmetic operation of above number systems (addition, subtraction, multiplication etc); 1’s and 2’s compliment; Gray codes and alphanumeric characters; Binary coded decimal and its uses.

Unit II: Boolean Algebra and Logic Gates                                                                   6 hours

Definition of a digital system; Basic theorem and properties of Boolean Algebra; Boolean functions; Digital logic gates and truth tables; Fundamental relationship of basic gates.

Unit III: Simplification of Boolean Functions                                                              6 hours

The Karnaugh map; Two and three variable maps; Four variable maps Product of sums simplification; NAND and NOR implementation; Don’t care conditions; Practical design Steps.

Unit IV: Combinational Logic with MSI and LSI                                                       8 hours

Introduction; Design procedures; Half and full adders; Subtractors; Code conversion; BCD to seven segment decoders; Encoder / Decoder; Multiplexers and Demultiplexers.

Unit V: Sequential Logic                                                                                                9 hours

Introduction; Flip-Flops: RS, D-Type, Clocked D-Type, J-K, and T type flip-flop, Master Slave, Triggering of flip flops (positive, negative and level trigger); Analysis of clocked sequential Circuits; State reduction and assignment; Flip-Flips  excitation Tables and design procedures.

Unit VI: Registers and Counters                                                                                   8 hours

Memories, Classification of memories, General storage method, Types of memories, Introduction Shift Registers (Serial in Serial Out, Serial in Parallel Out, Parallel in parallel Out, Parallel in Serial Out); Ripple counters; Design of divide by N counters; Synchronous Up/Down Counters; Timing Sequences; Buffers.

Unit VII: Logical Families                                                                                              2 hours

Overview of semiconductor technologies used for IC fabrication, Basic idea of TTL, ECL I2L, PMOS, NMOS, CMOS and their application, Levels of integration (SSI, MSI, LSI, VLSI, ULSI).

Unit VIII: Central Processor Organization                                                                  5 hours

Processor Bus Organization; Arithmetic Logic Unit (ALU); Flags, Stack Organization and Memory Stack formats.

Lab Works

1. Verification of basic gates function (OR, AND, NAND, NOR, EX-OR, EX_NOR)
2. Multiplexers and demultiplexers (using the principle learned in K-Map).
3. Encoders and decoders (using the principle learned in K-Map)
4. Adder and subtractors, in this laboratory students will construct a full adder and subtractor using basic design principle
5. RS, D-Type, clocked D and master slave. In this laboratory students will design and verify the concepts of different flip-flops based on basic logic gates.
6. Design of counters (decade counters and binary counters). Students will design decade and binary counters verify the concepts using various tools.
7. Design of shift registers (serial in serial out and parallel in parallel out

Basic Texts

1. Morris Mano: Digital Logic and Computer Design, Pearson Prentice
2. L Floyd: Digital Fundamentals, Pearson International Edition
3. Malvino: Digital Computer Electronics, Pearson Prentice