often symmetric. More precisely, the channel exists when the voltage between the gate and source, Vgs, exceeds a critical value called the threshold voltage, Vt . In most MOSFETs Vt

> 0 so current cannot flow between the source and drain when there is no difference in voltage between the gate and source. This, called an enhancement-mode device, is indicated by the broken line in the symbol for the devices in the figure.

We normally think of a MOSFET as a three-terminal device but in practice there is a fourth connection to the body or substrate. The reason is that the source–body and drain–body junctions act like n–p diodes, which must be kept reverse biased for correct operation of the device. The body is typically connected to VSS in an integrated circuit, which is the most negative point. In a discrete device, the body is connected to the source, as shown in the symbol. A diode remains between the source and drain, which comes into play with inductive loads as we see in the section “Driving Heavier Loads” on page 247.

The signs of the voltages and current are reversed in a p-channel MOSFET. The drain is negative with respect to the source and the gate–source voltage must be made more negative than the threshold voltage to turn on the channel. One of the most significant features of a MOSFET is that the gate is separated from the channel by a thin layer of silicon dioxide, which is an insulator. Thus there is no direct electrical connection between the source and channel. Instead, the gate, oxide, and channel form a capacitor. This is reflected in the symbol by a gap between the gate and channel. No current flows into a capacitor when the voltage across it is constant, which is a key factor in the low power consumption of CMOS circuits. Thus the MSP430 can retain the contents of its registers in LPM4 while drawing less than 1_A. On the other hand, current must flow to charge and discharge the gate–channel capacitance when the transistors change state and these accounts for most of the supply current in CMOS.

This gate oxide is only a few nanometers (10−9 m) thick in a modern transistor. Silicon Dioxide is an excellent insulator but even this breaks down if the electric field across it becomes too large. It is easy for a person to acquire large voltages through static electricity—walking across a nylon carpet in dry weather generates enough charge to cause a spark when you next touch a grounded conducting object. CMOS devices must therefore be handled only at workstations that are protected against static electricity by grounding and an appropriate choice of materials. Integrated circuits themselves are also protected by connecting diodes between inputs and the supply rails, as shown in Figure 7.1(a). Recall that current flows only in the direction shown by the arrow symbol for the diode. These are reverse-biased in normal operation, where VSS <Vin <VCC. They turn on to protect the circuit when the input strays by more than about 0.3V outside the supply rails, Vin <VSS−0.3V or Vin >VCC+0.3V. The magnitude of the current through these diodes should not exceed 2 mA.

The input protection diodes can cause a puzzling side effect. Suppose that a logical high input is applied to a circuit whose power supply is not connected. Current flows through the protection diode from the input to VCC, from where it supplies the rest of the circuit.

Thus the circuit works almost normally, despite having no apparent source of power.

After that diversion, we can explain the operation of a CMOS inverter with the aid of Figure 7.2. A model inverter can be made with a pair of controlled switches, one between the output and VSS to pull the output down to logic 0 and the other between the output and VCC to provide a logic 1. Ideally one switch should always be closed and one open.

If the input is a logical 1, the output should be a logical 0, which needs the switch to VSS closed and that to VCC open, as in Figure 7.2(a). The lower switch should therefore close when the input is relatively positive (near VCC) and the upper switch should be open under the same conditions, passing no current. Everything is reversed when the input is a logical 0, near VSS.

This can be achieved by using an n-channel MOSFET (n-MOSFET for short) for the lower switch and a p-MOSFET for the upper switch, as shown in Figure 7.2(b). A channel is created in the n-MOSFET, allowing conduction in the same way as a closed switch, when its gate is driven positive by a high input or logical 1. When the input falls to a logic 0, so Vin = VSS, there is no difference in potential between the gate and source of the MOSFET.

Thus Vgs = 0, the channel vanishes, and no current flows. This is just like an open sw