Some of the driving factors behind the need to design for performance:

  • Microprocessor Speed
    • Pipelining
    • On board cache, on board L1 & L2 cache
    • Branch prediction: The processor looks ahead in the instruction code fetched from memory and predicts which branches, or group of instructions are likely to be processed next.
    • Data flow analysis: The processor analyzes which instructions are dependent on each other’s results, or data, to create an optimized schedule of instructions to prevent delay.
  • Speculative execution: Using branch prediction and data flow analysis, some processors speculatively execute instructions ahead of their actual appearance in the program execution, holding the results in temporary locations.
  • Performance Mismatch
    • Processor speed increased
    • Memory capacity increased
    • Memory speed lags behind processor speed

Below figure depicts the history; while processor speed and memory capacity have grown rapidly, the speed with which data can be transferred between main memory and the processor has lagged badly.

                          Fig: Evolution of DRAM and processor Characteristics


The effects of these trends are shown vividly in figure below. The amount of main memory needed is going up, but DRAM density is going up faster (number of DRAM per system is going down).

                                                        Fig: Trends in DRAM use


  • Increase number of bits retrieved at one time
    • Make DRAM “wider” rather than “deeper” to use wide bus data
  • Change DRAM interface
    • Cache
  • Reduce frequency of memory access
    • More complex cache and cache on chip
  • Increase interconnection bandwidth
    • High speed buses
    • Hierarchy of buses