• Processor with direct memory access capability that communicates with I/O devices
  • Channel accesses memory by cycle stealing
  • Channel can execute a Channel Program
  • Stored in the main memory
  • Consists of Channel Command Word(CCW)
  • Each CCW specifies the parameters needed by the channel to control the I/O devices and perform data transfer operations
  • CPU initiates the channel by executing a channel I/O class instruction and once initiated, channel operates independently of the CPU

A computer may incorporate one or more external processors and assign them the task of communicating directly with the I/O devices so that no each interface need to communicate with the CPU. An I/O processor (IOP) is a processor with direct memory access capability that communicates with I/O devices. IOP instructions are specifically designed to facilitate I/O transfer. The IOP can perform other processing tasks such as arithmetic logic, branching and code translation.           

                 

                                              Fig: Block diagram of a computer with I/O Processor

The memory unit occupies a central position and can communicate with each processor by means of direct memory access. The CPU is responsible for processing data needed in the solution of computational tasks. The IOP provides a path for transferring data between various peripheral devices and memory unit.

In most computer systems, the CPU is the master while the IOP is a slave processor. The CPU initiates the IOP and after which the IOP operates independent of CPU and transfer data between the peripheral and memory. For example, the IOP receives 5 bytes from an input device at the device rate and bit capacity. After which the IOP packs them into one block of 40 bits and transfer them to memory. Similarly the O/P word transfer from memory to IOP is directed from the IOP to the O/P device at the device rate and bit capacity.

CPU – IOP Communication

The memory unit acts as a message center where each processor leaves information for the other. The operation of typical IOP is appreciated with the example by which the CPU and IOP communication.

                                   

                                                                        Fig: CPU – IOP communication

  • The CPU sends an instruction to test the IOP path.
  • The IOP responds by inserting a status word in memory for the CPU to check.
  • The bits of the status word indicate the condition of the IOP and I/O device, such as IOP overload condition, device busy with another transfer or device ready for I/O transfer.
  • The CPU refers to the status word in in memory to decide what to do next.
  • If all right up to this, the CPU sends the instruction to start I/O transfer.
  • The CPU now continues with another program while IOP is busy with I/O program.
  • When IOP terminates the execution, it sends an interrupt request to CPU.
  • CPU responds by issuing an instruction to read the status from the IOP.
  • IOP responds by placing the contents to its status report into specified memory location.
  • Status word indicates whether the transfer has been completed or with error.