• The various processors in a multiprocessor system must be provided with a facility for communicating with each other.
  • A communication path can be established through a portion of memory or a common input-output channels.
  • The sending processor structures a request, a message, or a procedure, and places it in the memory mailbox.
    • Status bits residing in common memory
    • The receiving processor can check the mailbox periodically.
    • The response time of this procedure can be time consuming.
  • A more efficient procedure is for the sending processor to alert the receiving processor directly by means of an interrupt signal.
  • In addition to shared memory, a multiprocessor system may have other shared resources. g., a magnetic disk storage unit.
  • To prevent conflicting use of shared resources by several processors there must be a provision for assigning resources to processors. i.e., operating system.
  • There are three organizations that have been used in the design of operating system for multiprocessors: master-slave configuration, separate operating system, and distributed operating system.
  • In a master-slave mode, one processor, master, always executes the operating system functions.
  • In the separate operating system organization, each processor can execute the operating system routines it This organization is more suitable for loosely coupled systems.
  • In the distributed operating system organization, the operating system routines are distributed among the available processors. However, each particular operating system function is assigned to only one processor at a time. It is also referred to as a floating operating system.

Loosely Coupled System

  • There is no shared memory for passing information.
  • The communication between processors is by means of message passing through I/O channels.
  • The communication is initiated by one processor calling a procedure that resides in the memory of the processor with which it wishes to communicate.
  • The communication efficiency of the interprocessor network depends on the communication routing protocol, processor speed, data link speed, and the topology of the network.

Inter Process Synchronization

  • The instruction set of a multiprocessor contains basic instructions that are used to implement communication and synchronization between cooperating processes.
    • Communication refers to the exchange of data between different processes.
    • Synchronization refers to the special case where the data used to communicate between processors is control information.
  • Synchronization is needed to enforce the correct sequence of processes and to ensure mutually exclusive access to shared writable data.
  • Multiprocessor systems usually include various mechanisms to deal with the synchronization of resources.
    • Low-level primitives are implemented directly by the hardware.
    • These primitives are the basic mechanisms that enforce mutual exclusion for more complex mechanisms implemented in software.
    • A number of hardware mechanisms for mutual exclusion have been developed.
      • A binary semaphore

Mutual Exclusion with Semaphore

  • A properly functioning multiprocessor system must provide a mechanism that will guarantee orderly access to shared memory and other shared resources.
    • Mutual exclusion: This is necessary to protect data from being changed simultaneously by two or more processors.
    • Critical section: is a program sequence that must complete execution before another processor accesses the same shared resource.
  • A binary variable called a semaphore is often used to indicate whether or not a processor is executing a critical section.
  • Testing and setting the semaphore is itself a critical operation and must be performed as a single indivisible operation.
  • A semaphore can be initialized by means of a test and set instruction in conjunction with a hardware lock mechanism.
  • The instruction TSL SEM will be executed in two memory cycles (the first to read and the second to write) as follows: R ß M[SEM], M[SEM] ß 1
  • Note that the lock signal must be active during the execution of the test-and-set instruction.