The CPU incorporates sixteen 16-bit registers:

  • Four registers (R0, R1, ,R2 and R3) have dedicated functions;
  • There are 12 working registers (R4 to R15) for general use.

R0: Program Counter (PC)

The 16-bit Program Counter (PC/R0) points to the next instruction to be read from memory and executed by the CPU. The Program counter is implemented by the number of bytes used by the instruction (2, 4, or 6 bytes, always even). It is important to remember that the PC is aligned at even addresses, because the instructions are 16 bits, even though the individual memory addresses contain 8-bit values.

R1: Stack Pointer (SP)

The Stack Pointer (SP/R1) is located in R1. 1st: stack can be used by the user to store data for later use (instructions: store by PUSH, retrieve by POP); 2nd: stack can be used by the user or by the compiler for subroutine parameters (PUSH, POP in calling routine; addressed via offset calculation on stack pointer (SP) is called subroutine); 3rd: used by subroutine calls to store the program counter value for return at subroutine's end (RET); 4th: used by interrupt - system stores the actual PC value first, then the actual status register content (on top of stack) on return from interrupt (RETI) the system get the same status as just before the interrupt happened (as long as none has changed the value on TOS) and the same program counter value from the stack.

R2: Status Register (SR)

The Status Register (SR/R2) stores the state and control bits. The system flags are changed automatically by the CPU depending on the result of an operation in a register. The reserved bits of the SR are used to support the constant generator. See the device-specific data sheets for more details.

R2/R3: Constant Generator Registers (CG1/CG2)

Depending on the source-register addressing modes (As) value, six commonly used constants can be generated without a code word or code memory access to retrieve them. This is a very powerful feature, which allows the implementation of emulated instructions, for example, instead of implementing a core instruction for an increment, the constant generator is used.