Logical AND operation
2 years ago
Microprocessors
Assume cs: code, ds: dataData segment
op1 dw 00h
op2 dw 00h
res dw
00h
Data ends
Code segment
start: mov ax,data
mov ds,ax
mov ax,op1
mov bx,op2 and ax,bx
mov res,ax
int 3h
code ends
end start
INPUT: OP1:01h
OP2:01h
OUTPUT:
RES:01h
Rusma Khadka
Sep 17, 2022