• Control Storage: 128 20-bit words
  • The first 64 words: Routines for the 16 machine instructions 0, 4, 8, …, 60 gives four words in control memory for each routine.
  • The last 64 words: Used for other purpose (e.g., fetch routine and other subroutines)
  • The execution of the third (MAP) microinstruction in the fetch routine results in a branch to address 0xxxx00, were xxxx are the four bits of the operation code. e.g. ADD is 0000
  • In each routine we must provide microinstructions for evaluating the effective address and for executing the instruction.
  • The indirect address mode is associated with all memory-reference instructions.
  • A saving in the number of control memory words may be achieved if the microinstructions for the indirect address are stored as a subroutine.
  • This subroutine, INDRCT, is located right after the fetch routine, as shown in Table 3-2.
  • Mapping: OP-code XXXX into 0XXXX00, the first address for the 16 routines are 0(0 0000 00), 4(0 0001 00), 8, 12, 16, 20, ..., 60
  • To see how the transfer and return from the indirect subroutine occurs:
    • MAP microinstruction caused a branch to address 0
    • The first microinstruction in the ADD routine calls subroutine INDRCT when I=1
  • The return address is stored in the subroutine register SBR.
  • The INDRCT subroutine has two microinstructions:   INDRCT: READ U         JMP NEXT

                                                                                                         DRTAR U    RET

  • Therefore, the memory has to be accessed to get the effective address, which is then transferred to AR.
  • The execution of the ADD instruction is carried out by the microinstructions at addresses 1 and 2
  • The first microinstruction reads the operand from memory into DR.
  • The second microinstruction performs an add microoperation with the content of DR and AC and then jumps back to the beginning of the fetch routine.

                                  Table 3-2: Symbolic Microprogram for Control Memory (Partial)

Binary Microprogram

  • The symbolic microprogram must be translated to binary either by means of an assembler program or by the user if the microprogram is simple.
  • The equivalent binary form of the microprogram is listed in Table 7-3.
  • Even though address 3 is not used, some binary value, g. all 0’s, must be specified for each word in control memory.
  • However, if some unforeseen error occurs, or if a noise signal sets CAR to the value of 3, it will be wise to jump to address 64.

                 Table 3-3: Binary Microprogram for control memory (Partial)

Control Memory

  • When a ROM is used for the control memory, the microprogram binary list provides the truth table for fabricating the unit.
    • To modify the instruction set of the computer, it is necessary to generate a new microprogram and mask a new ROM.
  • The advantage of employing a RAM for the control memory is that the microprogram can be altered simply by writing a new pattern of 1’s and 0’s without resorting to hardware procedure.
  • However, most microprogram systems use a ROM for the control memory because it is cheaper and faster than a RAM.